1. Field of the Invention
The present invention relates to the cleaning of through holes in multilayer printed circuit boards, and more particularly relates to the cleaning of high aspect ratio through holes in multilayer printed circuit boards. 2. Description of the Prior Art
In the development of printed circuit boards, the circuit line densities on the board surfaces and innerplanes have increased and in addition the number of layers in a multilayer board has also increased to provide the necessary circuit capability. Accompanying these two phenomena have been the requirement that the size of the through holes in multilayer printed circuit boards be smaller to use up less of the board and innerplane surfaces. This has resulted in relatively high aspect ratio through holes in the multilayer printed circuit board to provide the necessary interconnections between the external planes of the printed circuit board and the internal planes of the printed circuit boards. The aspect ratio is defined as the length of the through hole (thickness of the multilayer printed circuit board) compared to the diameter of the through hole.
As the aspect ratio of the multilayer printed circuit boards has increased, it has become more difficult to effectively plate in a reliable fashion the necessary conductive metal in the through holes. Much of this has been due to the difficulty of removing internal smears, burrs, etc. from the through holes which are formed as a result of drilling or forming the through holes in the multilayer board. Conventional prior art techniques, such as vapor spraying and air blasting, do not provide the necessary cleanliness of the through holes prior to plating since with the high aspect ratio, the force of the vapor spray or air blast is diminished long before it proceeds through the hole.
With the difficulties in cleaning, have come the problems of failing to provide adequate contact to the innerplanes when the through hole is plated and a failure to provide a strong enough bond between the plated through hole and the innerplanes. The bond reliability may be viewed as being partially due to the increased "Z" stress placed on the through hole when interconnecting pins are passed therethrough.
In a paper entitled "Copper Plating Advanced Multilayer Boards -- A Capability Study" by W. A. Alpaugh and J. M. McCreary presented at the Institute of Printed Circuit Meeting of Sept. 20, 1976, it was noted that many of these problems can be eliminated in high aspect ratio through holes, if a slightly recessed "T" connection can be provided at the intersection between the plated through holes and the innerplane. However, to accomplish such a reliable "T" connection, it is necessary that there be a uniform etchback of the innerplanes and a very thorough, uniform cleaning of the materials in the high aspect ratio through holes.